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| DS1801 Dual Audio Taper Potentiometer www.dalsemi.com FEATURES Ultra-low power consumption Operates from 3V or 5V supplies Two digitally controlled, 65-position potentiometers including mute Logarithmic resistive characteristics (1 dB per step) Zero-crossing detection eliminates noise caused by wiper movement Serial port provides means for setting and reading both potentiometers wipers 14-pin PDIP, 16-pin SOIC, and 14-pin TSSOP packages Operating Temperature Range: - Industrial: -40C to +85C Software mute Resistance available: 45 k PIN ASSIGNMENT GND COUT RST ZCEN W0 L0 H0 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC CLK D AGND H1 L1 W1 DS1801 14-Pin PDIP (300-mil) DS1801 14-Pin TSSOP (173-mil) GND COUT RST ZCEN NC W0 L0 H0 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC CLK D NC AGND H1 L1 W1 PIN DESCRIPTION L0, L1 H0, H1 W0,W1 VCC RST D CLK GND AGND ZCEN COUT NC - Low End of Resistor High End of Resistor Wiper End of Resistor 3V or 5V Power Supply Input Serial Port Reset Input Serial Port Data Input Serial Port Clock Input Digital Ground Analog Ground Zero-Crossing Detect Input Cascade Output No Connect DS1801S 16-PIN SOIC (300-mil) See Mech. Drawings Section DESCRIPTION The DS1801 is a dual audio taper potentiometer having logarithmic resistive characteristics over the device range. Each potentiometer provides 65 wiper positions with a 1 dB increment per step and device mute. The 3-wire serial interface, using a CPU, provides the user the ability of reading or writing exact wiper positions of the two potentiometers. Additionally, the part contains a zero-crossing detection feature that minimizes noise resulting from wiper transitions. Packages for the part include a 14-pin PDIP, 16-pin SOIC, and 14-pin TSSOP. 1 of 10 030300 DS1801 OPERATION The DS1801 provides two 65-position potentiometers per package, each having a logarithmic resistive characteristic as shown in Table 1. The DS1801 is controlled by a 3-wire serial interface. The 3-wire serial interface is designed for CPU-controlled applications and allows the potentiometer's exact wiper position to be read or written. The DS1801 design supports daisy-chaining for multi-device environments. Figure 1 presents a block diagram of the DS1801. As shown, the inputs from the 3-wire serial interface drive a command/control unit. The command/control unit interprets these inputs for control of the two potentiometers. On power-up, the serial port is stable and active within 10 microseconds. The wiper position on power-up will be at position 63, the low end of the potentiometer. Position 64 is the mute level. RESISTANCE CHARACTERISTICS Table 1 POSITION 0 1 2 3 4 5 OUTPUT LEVEL (dB) 0 -1 -2 -3 -4 -5 63 64(mute) -63 <-90 DS1801 BLOCK DIAGRAM Figure 1 2 of 10 DS1801 3-WIRE SERIAL INTERFACE CONTROL Communication and control of the DS1801 is accomplished through a 3-wire serial port interface that drives an internal control logic unit. The 3-wire serial interface is designed for microprocessor or microcontroller applications. The interface consists of three input signals which include RST , CLK and D. The RST control signal is used to enable 3-wire serial port write operations. The CLK terminal is a clock signal input that provides synchronization for data I/O while the D signal input serves to transfer potentiometer wiper position settings to the device. As shown in Figure 3, a 3-wire serial port operation begins with a transition of the RST signal input to a high state. Once the 3-wire port has been activated, data is clocked into the part on the low to high transition of the CLK signal input. Data input via the D line is transferred in the order of the desired potentiometer-0 value followed by the potentiometer-1 value. The DS1801 contains two 65-position potentiometers whose wiper positions are set by an 8-bit value. These two 8-bit values are written to the 16-bit I/O shift register which is used to store wiper position during powered conditions. Because the potentiometer has 65-positions, only 7 bits of data are needed to set wiper position. A detailed diagram of the 16-bit I/O shift register is shown in Figure 2. Bits 0 through 7 are reserved for the potentiometer-0 control while bits 8 through 15 are reserved for control of potentiometer-1. Bits 0 through 5 are used for actual wiper positioning of potentiometer-0. Bit 6 is used to mute potentiometer-0. If this bit has value 1, the potentiometer-0 wiper will be connected to the low end of the resistive array the mute position. The value of bit 7 is a "don't care" and will not affect operation of the DS1801 or potentiometer-0. Bits 8 through 13 are used for wiper positioning of potentiometer-1. Bit 14 is used for muting of the potentiometer-1 wiper output. Bit 15, like bit 7, is a "don't care" and will not affect operation of the DS1801. Data for the DS1801 is transmitted LSB first starting with bit 0. A complete transmission of 16 bits of data is required to insure proper setting of each potentiometer's wiper. An incomplete transmission may result in undesired wiper settings. Once the complete 16 bits of information has been transmitted and the RST signal input transitions to a low state, the new wiper positions are loaded into the part. 16-BIT I/O SHIFT REGISTER Figure 2 3 of 10 DS1801 TIMING DIAGRAMS Figure 3 4 of 10 DS1801 CASCADE OPERATION A feature of the DS1801 is the ability to control multiple devices from a single processor. Multiple DS1801s can be linked or daisy-chained as shown in Figure 4. As a data bit is entered into the I/O shift register of the DS1801, bit 0 of the I/O shift register will appear at the COUT output after a maximum delay of 50 nanoseconds. The COUT output of the DS1801 can be used to drive the D input of another DS1801. When connecting multiple devices, the total number of bits sent is always 16 times the number of DS1801s in the daisy chain. An optional feedback resistor can be placed between the C OUT terminal of the last device and the D input of the first DS1801 thus allowing the controlling processor to read as well as write data or circularly clock data through the daisy chain. The value of the feedback or isolation resistor should be in the range from 2 to 10 kohms. When reading data via the COUT pin and isolation resistor, the D line is left floating by the reading device. When RST is driven high, bit 0 is present on the COUT pin, which is fed back to the input D pin through the isolation resistor. When the CLK input transitions low to high, bit 0 is loaded into the first position of the I/O shift register and bit 1 becomes present on COUT and D of the next device. After 16 bits (or 16 times the number of DS1801s in the daisy chain), the data has shifted completely around and back to its original position. When RST transitions to the low state to end data transfer, the value (the same as before the read occurred) is loaded into wiper-0 and wiper-1. CASCADING MULTIPLE DEVICES Figure 4 Zero-Crossing Detection The DS1801 provides a zero-crossing detection capability that minimizes any audible noise that may result from sizable discrete wiper transitions when using the part in audio applications. The zero-crossing detect feature allows independent wiper changes only when the two terminals of the potentiometer have equal potentials and are within a 50 ms time window from the fall of the RST signal. If at 50 ms the DS1801 has not detected a zero-crossing, the wiper position of the potentiometer(s) will change regardless of the state of the input signal. Zero-crossing detection is activated when the ZCEN input level is in a low-state. When high, the ZCEN input deactivates both the 50 ms time requirement and zero detection crossing. 5 of 10 DS1801 TYPICAL SUPPLY CURRENT VS. SERIAL CLOCK RATE Figure 5 6 of 10 DS1801 ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature -0.7V to +7.0V -40 to +85C; industrial -55C to +125C 260C for 10 seconds * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS PARAMETER Supply Voltage Input Logic 1 Input Logic 0 Resistor Inputs Analog Ground SYMBOL VCC VIH VIL L,H,W AGND MIN +2.7 +2.0 -0.5 GND-0.5 GND-0.5 TYP MAX 5.5 VCC+0.5 +.08 VCC+0.5 GND+0.5 (-40C to +85C) UNITS V V V V V 1,2 1,2 2 10 NOTES DC ELECTRICAL CHARACTERISTICS PARAMETER Supply Current Input Leakage Wiper Resistance Wiper Current Logic 1 Output Current @2.4V Logic 0 Output Current @0.4V Standby Current: 3 Volts 5 Volts SYMBOL ICC ILI RW IW IOH IOL 2 -1 MIN (-40C to +85C; VCC=2.7V to 5.5V) TYP MAX UNITS A +1 400 1 -.4 A mA mA mA 12 20 30 50 A A 11 2 2 NOTES 9 7 of 10 DS1801 ANALOG RESISTOR CHARACTERISTICS (-40C to +85C; VCC=2.7V to 5.5V) PARAMETER End to End Resistor Tolerance Absolute Tolerance Interchannel Matching Tap-to-Tap Tolerance -3 dB Cutoff Frequency Temperature Coefficient Total Harmonic Distortion (VIN=1VRMS, 1 kHz, Tap= -6 dB) Output Noise (20 Hz to 20 kHz, Grounded Input, Tap= -6 dB) Digital Feedthrough (20 Hz to 20 kHz, Tap= -6 dB) Interchannel Isolation (20 Hz to 20kHz, Tap= -6 dB) Mute Control Active Mute THD fCUTOFF SYMBOL MIN -20 -1 -0.5 -0.25 700 750 0.002 TYP MAX +20 +1 +0.5 +0.25 UNITS % dB dB dB kHz ppm/C % 12 NOTES 13 8 4 5,12 2.2 -90 -100 -90 VRMS dB dB dB 12 12 CAPACITANCE PARAMETER Input Capacitance Output Capacitance SYMBOL CIN COUT MIN (-40C to +85C; VCC=2.7V to 5.5V) TYP MAX 5 7 UNITS pF pF NOTES 6 6 8 of 10 DS1801 AC ELECTRICAL CHARACTERISTICS PARAMETER CLK Frequency Width of CLK Pulse Data Setup Time Data Hold Time Propagation Delay Time Low to High Level Clock to Output Propagation Delay Time Low to High Level RST High (-40C to +85C; VCC=2.7V to 5.5V) TYP MAX 10 UNITS MHz ns ns ns 50 ns NOTES 7 7 7 7 7 SYMBOL fCLK tCH tDC tCDH tPLH MIN DC 50 30 10 tPLH tCC tHLT tCR tRLT 200 50 50 50 ns ns ns 7 7 7 7 7 to Clock Input High Clock Input High RST Low to CLK Rise Time RST 60 ns ns Inactive NOTES: 1. All voltages are referenced to ground. 2. Valid for VCC = 2V only. 3. Capacitance values apply at 25C. 4. Inter-channel matching is used to determine the relative voltage difference in dB between the same tap position on each potentiometer. The DS1801 is specified for 0.5 dB inter-channel matching. 5. Tap-to-tap tolerance is used to determine the change in voltage between successive tap positions. The DS1801 is specified for 0.25 dB tap-to-tap tolerance. 6. Typical values are for TA =25C and nominal supply voltage. 7. See Figure 3. 8. Absolute tolerance is used to determine measured wiper voltage vs. expected wiper voltage as determined by wiper position. The DS1801 is bounded by a 1 dB absolute tolerance. 9. Maximum current specifications are based on clock rate and active zero-crossing detection. See Figure 5 for clock rate vs. current specification. 10. See Figure 7. 11. Standby current levels apply when all inputs are driven to appropriate supply levels. 12. These parameters are characterized and not 100% tested. 13. Valid at 25 C only. 9 of 10 DS1801 DIGITAL OUTPUT LOAD Figure 6 INTERNAL GROUND CONNECTIONS Figure 7 NOTE: GND and AGND must be tied to the same voltage level. DS1801 ORDERING INFORMATION ORDERING INFORMATION DS1801 DS1801E DS1801S PACKAGE 14L DIP 14L TSSOP (173-mil) 16L SOIC (300-mil) OPERATING TEMPERATURE -40C to +85C -40C to +85C -40C to +85C VERSION 45 k 45 k 45 k 10 of 10 |
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